ICCBN 2008, July 17-20 2008, IISc, Bangalore
Advanced Computing and Communication Society (ACS) of India is organizing ICCBN 2008 conference (International Conference on Communication, Convergence, and Broadband Networking) from July 17th to 20th 2008 at National Science Seminar Complex at Indian Institute of Science (IISc), Bangalore. ICCBN Conference aims to provide a premier forum for researchers, industry practitioners and educators to present…
Non coherent demodulation of pi/8 D8PSK (TETRA)
In TETRA specifications, one of the modulation technique used is Differential 8 Phase Shift Keying (D8PSK). We will discuss the bit error rate with non-coherent demodulation of D8PSK in Additive White Gaussian Noise (AWGN) channel.
GATE-2012 ECE Q26 (electronic devices)
Question 26 on Electronic Devices from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q26. The source of a silicon (), n-channel MOS transistor has an area of and a depth of . If the dopant density in the source is , the number of holes in the source region with…
Comparing BPSK, QPSK, 4PAM, 16QAM, 16PSK, 64QAM and 32PSK
I have written another article in DSPDesginLine.com. This article can be treated as the third post in the series aimed at understanding Shannon’s capacity equation. For the first two posts in the series are: 1. Understanding Shannon’s capacity equation 2. Bounds on Communication based on Shannon’s capacity The article summarizes the symbol error rate derivations…
GATE-2012 ECE Q36 (math)
Question 36 on math from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q36. A fair coin is tossed till a head appears for the first time. The probability that the number of required tosses is odd, is (A) 1/3 (B) 1/2 (C) 2/3 (D) 3/4 Solution Let us start by…
GATE-2012 ECE Q16 (electromagnetics)
Question 16 on electromagnetics from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q16. A coaxial cable with an inner diameter of 1mm and outer diameter of 2.4mm is filled with a dielectric of relative permittivity 10.89. Given , the characteristic impedance of the cable is (A) (B) (C) (D) Solution To…
Happy New Year 2010
Wishing all the readers of dsplog.com a great year 2010 ! Its been a mixed year for dsplog. Some key milestones a) Crossing 1000 subscribers with 1100+ comments in March 2009 b) Crossing 100 posts with 2200 subscribers and 2600+ comments in October 2009 c) As I write this, we have 102 posts with 2603…
Summary – feedback on [dspLog], July 2008
On July30th, 2008 I had sent a request for feedback to 93 subscribers who have opted to receive articles over email. As on 3rd August, I received the response from around 8 persons. Not bad, around 8.5% response. Thanks a lot for the feedback. I will summarize the response from the group and note down…
BPSK BER with OFDM modulation
Oflate, I am getting frequent requests for bit error rate simulations using OFDM (Orthogonal Frequency Division Multiplexing) modulation. In this post, we will discuss a simple OFDM transmitter and receiver, find the relation between Eb/No (Bit to Noise ratio) and Es/No (Signal to Noise ratio) and compute the bit error rate with BPSK.
Understanding Shannon’s capacity equation
Let us try to understand the formula for Channel Capacity with an Average Power Limitation, described in Section 25 of the landmark paper A Mathematical Theory for Communication, by Mr. Claude Shannon. Further, the following writeup is based on Section 12.5.1 from Fundamentals of Communication Systems by John G. Proakis, Masoud Salehi
2nd order sigma delta modulator
In a previous post, the variance of the in-band quantization noise for a first order sigma delta modulator was derived. Taking it one step furhter, let us find the variance of the quantization noise filtered by a second order filter. With a first order filter, the quantization noise passes through a system with transfer function…
ADC SNR with clock jitter and quantization noise
My friend and colleague Mr. Vineet Srivastava pointed me to a nice article on clock jitter – Clock Jitter Effects on Sampling : A tutorial – by Carlos Azeredo-Leme, IEEE Circuits and Systems Magazine, Third Quarter 2011. In this post, let us discuss the total Signal to Noise Ratio at the output of an analog to…
GATE-2012 ECE Q7 (digital)
Question 7 on digital from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q7. The output Y of a 2-bit comparator is logic 1 whenever the 2 bit input A is greater than 2 bit input B. The number of combinations for which output is logic 1 is (A) 4 (B)…