In this post, we will derive the theoretical equation for bit error rate (BER) with Binary Phase Shift Keying (BPSK) modulation scheme in Additive White Gaussian Noise (AWGN) channel. The BER results obtained using Matlab/Octave & Python simulation scripts show good agreement with the derived theoretical results. System Model Transmitter With Binary Phase Shift Keying…
This is the third post in the series discussing receiver diversity in a wireless link. Receiver diversity is a form of space diversity, where there are multiple antennas at the receiver. The presence of receiver diversity poses an interesting problem – how do we use ‘effectively‘ the information from all the antennas to demodulate the…
Question 6 on digital circuit from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q6. Consider the given circuit In this circuit, the race around (A) does not occur (B) occurs when CLK=0 (C) occurs when CLK=1 and A=B=1 (D) occurs when CLK=1 and A=B=0
We have discussed quite a few receiver structures for a 2×2 MIMO channel namely, (a) Zero Forcing (ZF) equalization (b) Minimum Mean Square Error (MMSE) equalization (c) Zero Forcing equalization with Successive Interference Cancellation (ZF-SIC) (d) ZF-SIC with optimal ordering and (e) MIMO with MMSE SIC and optimal ordering From the above receiver structures, we…
In a previous post, the variance of the in-band quantization noise for a first order sigma delta modulator was derived. Taking it one step furhter, let us find the variance of the quantization noise filtered by a second order filter. With a first order filter, the quantization noise passes through a system with transfer function…
Question 13 on analog electronics from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper. Q13. The diodes and the capacitors in the circuit shown are ideal. The voltage across the diode is (A) (B) (C) (D) Solution The first half of the circuit is a negative clamper circuit and the second half…
We have quite a few articles discussing bit and symbol error rates for popular digital modulation schemes in Additive White Gaussian Noise (AWGN) channel. This post summarizes the articles discussing the theoretical and simulated error rates for the digital modulation schemes like BPSK, QPSK, 4–PAM, 16PSK and 16QAM. Further, Bit Error Rate with Gray coded…
We have installed Google FriendConnect on dspLog.com. With Google Friend Connect, you can: (a) You can interact with other members who have similiar interests. You will come to know the list of other sites (apart from dspLog.com) where the members have joined. You can add a member as a friend and so on. (b) You…
In previous posts, we have discussed convolutional codes with Viterbi decoding (hard decision, soft decision and with finite traceback). Let us know discuss a block coding scheme where a group of information bits is mapped into coded bits. Such codes are referred to as codes. We will restrict the discussion to Hamming codes, where 4…
In May 2008, we derived the theoretical symbol error rate for a general M-QAM modulation (in Embedded.com, DSPDesignLine.com and dsplog.com) under Additive White Gaussian Noise. While re-reading that post, felt that the article is nice and warrants a re-run, using OFDM as the underlying physical layer. This post discuss the derivation of symbol error rate for a general…
In this post, we will explore a probable way of reducing PAPR (peak to average power ratio) in OFDM by changing the phase of some of the subcarriers. This is in response to the comment to post on Peak to Average power ratio for OFDM, where Mr. Elibom suggested to reduce the PAPR by cyclically…
Coding is a technique where redundancy is added to original bit sequence to increase the reliability of the communication. In this article, lets discuss a simple binary convolutional coding scheme at the transmitter and the associated Viterbi (maximum likelihood) decoding scheme at the receiver. Update: For some reason, the blog is unable to display the…
Thanks to the nice article from Xilinx TechXclusives [XLNX-TECH], let us try to understand the probable digital implementation of resistor-capacitor based low pass filter. Consider a simple RC filter shown in the figure below. Assuming that there is no load across the capacitor, the capacitor charges and discharges through the resistor path. Figure: RC low…
In DSP-Proakis, I found the problem 2.56 interesting as it provides insight into delta modulation. The task is to show that, where is any discrete time signal and is the unit step function.